三浦 幸也（ミウラ ユキヤ） 2006年度

研究業績

学会発表

Proposal of a Clock Signal Generation/Detection Method for Crosstalk Aware Design, European Test Symposium 2006-5.
Fault Diagnosis of Analog Circuits Based on Adaptive Test and Output Characteristics,21st IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems, 2006-10.
Detection of Interconnect Open Faults with Unknown Values by Ramp Voltage Application, 15th Asian Test Symp. 2006-11.
ディジタル回路の適応検査を応用したアナログ回路の故障診断，電子情報通信学会ディペンダブルコンピューティング研究会，2007-2.

論文発表

Proposal of Dependable Clock Signal Distribution, Information Technology Letters, Forum on Information Technology 2006-9.
Proposal of Fault Diagnosis of Analog Circuits by Combining Operation-Region model and
X-Y Zoning method: Case Study, Yukiya Miura, Journal of Electronic Testing: Theory and Applications, 2006-12.

対外的な諸活動

学会活動

①IEEE, ・TTTC, Technical Activities, Iddq Testing Committee Member ・ The Fifteenth Asian Test Symposium, Secretary ・ The Eighth Workshop on RTL ATPG & DFT, ATS Liaison ・ The IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Program Committee Member ・The Eleventh IEEE European Test Symposium, Program Committee Member, ,
②電子情報通信学会, ・ソサイエティ論文誌編集委員会, 査読委員 ・各種英文論文誌特集号, 編集委員 ・各種和文論文誌特集号, 編集委員, ,

受賞・表彰等

FIT2006(Forum on Information Technology 2006)論文賞, 2006-9，情報処理学会・電子情報通信学会情報．